This invention relates to a method and apparatus for encoding an information word and, more particularly, for encoding an n-bit information word into an m-bit code word wherein the DC component of successive code words is minimized, and wherein n.gtoreq.2 and m&gt;n.
Various techniques have been developed to transmit, or convey, a plural-bit digital signal, such as an n-bit digital signal, from one location, or medium, to another, wherein the digital signal which ultimately is received exhibits sufficient fidelity such that the original signal can be recovered. For example, digital signals are encoded in non-return-to-zero (NRZ) format, are encoded in various forms of error correcting codes, and are modulated in accordance with different modulation techniques in order to reduce errors and to ensure proper recovery of the original digital signals.
While many of the aforementioned techniques are successful, not all of them are available when, for example, a digital signal is to be magnetically recorded directly. One advantageous use of direct digital recording is in the field of video signal recording. Typically, video tape recorders (VTR's) are used to record video signals, such as a composite color video signal, in analog form. However, the advantages of digital techniques to obtain accurate, high fidelity reproductions, can be utilized in digital video recording systems. Accordingly, digital VTR's have been proposed, wherein a color video signal is sampled, and each sample is converted into an n-bit (e.g. 8-bit) digital signal. Successive 8-bit samples of the color video signal are recorded on magnetic tape by one or more rotary heads. An example of such a digital VTR is described in greater detail in copending application Ser. No. 192,358 now U.S. Pat. No. 4,329,708.
In such a digital VTR, the 8-bit digital signal is supplied to the rotary head via a recording amplifier and a rotary transformer. The transformer, and also the amplifier, cannot transmit, or pass, a DC signal. Consequently, the DC component of the digital signal, that is, the DC levels which represent the binary "1" and "0" logic conditions, are cut off. This means that the digital signal is recorded without its original DC component. As a consequence thereof, the recorded version of the original digital signal may be substantially distorted, thereby hindering accurate reproduction of the original digital signal. Still further, during reproduction of the digital signal from the magnetic tape, if any remanant DC component is present, the reproducing circuit components tend to inhibit any reproduction of even that remanant component. Also, if the number of transitions in the recorded digital signal is low, for example, if the run-length of the "0"s and "1"s is high, the level of the reproduced digital signal is reduced. Consequently, to minimize distortion in the recording and subsequent reproduction of a digital signal, it is desirable to minimize the DC component of the original signals.
If a binary "1" is represented by, for example, a DC level of +1 volt, and if a binary "0" is represented by a DC level of -1 volt, then a binary "1" followed by a binary "0" [10] will exhibit a zero DC component. A combination of bits, such as [100] exhibits a DC component of -1. A combination of bits [1001] exhibits a DC component of 0. Thus, a plural-bit word may be thought of as having a DC component that is equal to the difference between the number of binary "1"s and "0"s contained in that plural-bit word. This DC component is referred to in the specification and claims as the "disparity" of that plural-bit word. If the disparity of a digital word is positive, then the number of binary "1"s exceeds the number of binary "0"s in that word. Conversely, if the disparity of a digital word is negative, then the number of binary "1"s is less than the number of binary "0"s. A digital word formed of an odd number of bits will exhibit a non-zero disparity, the absolute magnitude of which represents the number of bits of one state which exceed the number of bits of the other state, and the polarity (i.e. plus or minus) represents whether the binary "1"s exceed the "0"s (positive disparity) or the binary "0"s exceed the "1"s (negative disparity). A plural-bit word formed of an even number of bits may exhibit either positive disparity, negative disparity or zero disparity, the latter being present when the number of binary "1"s equals the number of binary "0"s.
One technique for maintaining a low DC component in the original digital signal, which would reduce the distortion in the reproduced digital signal, is to utilize a so-called low disparity code. In low disparity encoding, an original digital signal is converted to a digital signal having a greater number of bits, the total number of bits in that converted digital signal being an even number. For example, if the original digital signal is a 4-bit word, then one type of low disparity encoding technique is to convert that 4-bit information word into a 6-bit code word, each 6-bit code word having zero disparity, that is, each 6-bit code word is comprised of three binary "1"s and three binary "0"s. Since the number of "1"s is equal to the number of "0"s, the code word exhibits zero disparity. This low disparity encoding technique is known as the (4, 6; 0) coding technique, which means that an original 4-bit information word is encoded into a 6-bit code word having zero disparity. It is appreciated that a 4-bit code is capable of representing sixteen different words. In a 6-bit word, there are twenty individual words which contain an equal number (i.e. three) of "0"s and "1"s. Furthermore, each 6-bit code word representation of a 4-bit information word may exhibit an acceptable run-length. That is, the number of consecutive "1"s or "0"s in the 6-bit code word need not be too great.
However, if the (4, 6; 0) low disparity code technique is used to encode an 8-bit video sample for digital recording, it is necessary to represent each 8-bit video sample, or information word, as a 12-bit code word. Of these twelve bits, four bits do not represent useful information and, therefore, are redundant. In the simplified 6-bit code word, two bits are redundant. That is, these additional bits are provided merely to result in low disparity so as to reduce the DC component of the digital signal to be recorded. Such redundant bits, when recorded, result in a higher density on the recording medium. That is, in a specified recording area which previously contained four (or eight) information bits, there are provided six (or twelve) bits. Still further, when six bits are recorded in an area which previously contained four bits, the width of each of those six bits is reduced relative to the width of each of the original four bits. This reduces the so-called "detecting window" during which a reproduced bit can be sensed. Hence, there is a greater possibility of introducing error into the reproduced low disparity code word. Yet another disadvantage of this type of low disparity coding technique is that, if a read only memory (ROM) is used to encode an 8-bit information word into a 12-bit code word, the memory capacity of the ROM must be high. It is thus difficult to construct a satisfactory low disparity encoder as a large scale integrated (LSI) circuit.